all:clean vcs

vcs:
	vcs  \
		-f filelist.f \
        -timescale=1ns/1ns \
        -full64  -R  +vc  +v2k  -sverilog  -debug_access+all  \
		-cm line+tgl+branch+fsm \
        |tee vcs.log 

verdi  :
	verdi -sv -f filelist.f -ssf tb.fsdb &

#-------------------------------------------------------------------------------------------------------
clean  :
	 rm  -rf  *~  core  csrc  simv*  vc_hdrs.h  ucli.key  urg* *.log  novas.* *.fsdb* verdiLog  64* DVEfiles *.vpd
	 rm -rf INCA_libs irun*
	 rm -rf modelsim.ini transcript work
#-------------------------------------------------------------------------------------
